Povej prijatelju o tem izdelku:
A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science Mikhail Kovalev 2014 edition
A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science
Mikhail Kovalev
It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.
352 pages, 147 black & white illustrations, biography
| Medij | Knjige Paperback Book (Knjiga z mehkimi platnicami in lepljenim hrbtom) |
| Izdano | 1. decembra 2014 |
| ISBN13 | 9783319139050 |
| Založniki | Springer International Publishing AG |
| Strani | 352 |
| Dimenzije | 155 × 235 × 19 mm · 508 g |
| Jezik | Angleščina |
Več od Mikhail Kovalev
Prikaži vseMere med samme udgiver
Ogled vseh Mikhail Kovalev ( Na primer Paperback Book )