Advanced HDL Synthesis and SOC Prototyping - Taraate - Books - Springer Verlag, Singapore - 9789811087752 - January 18, 2019
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Taraate
Advanced HDL Synthesis and SOC Prototyping 1st ed. 2019 edition

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This book describes RTL design using Verilog, synthesis and timing closure for System On Chip (SOC) design blocks. It covers the complex RTL design scenarios and challenges for SOC designs and provides practical information on performance improvements in SOC, as well as Application Specific Integrated Circuit (ASIC) designs.

795 pages, 80 Illustrations, color; 60 Illustrations, black and white; V, 795 p. 140 illus., 80 illu

Media Books     Book
Released January 18, 2019
ISBN13 9789811087752
Publishers Springer Verlag, Singapore
Pages 307
Dimensions 150 × 220 × 20 mm   ·   639 g

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