Digital Logic Design Using Verilog: Coding and RTL Synthesis - Vaibbhav Taraate - Knjige - Springer, India, Private Ltd - 9788132227892 - 21. maja 2016
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Vaibbhav Taraate
Digital Logic Design Using Verilog: Coding and RTL Synthesis 1st ed. 2016 edition

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This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design.

402 pages, 41 black & white illustrations, 226 colour illustrations, 15 colour tables, biography

Medij Knjige     Hardcover Book   (Knjiga s trdim hrbtom in platnicami)
Izdano 21. maja 2016
ISBN13 9788132227892
Založniki Springer, India, Private Ltd
Strani 416
Dimenzije 150 × 220 × 20 mm   ·   902 g

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