Zheng Wang
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip - Computer Architecture and Design Methodologies Zheng Wang 1st ed. 2018 edition

Name: High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip - Computer Architecture and Design Methodologies
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Author: Zheng Wang

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Softcover reprint of the original 1st ed. 2018 edition

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High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip - Computer Architecture and Design Methodologies

Zheng Wang

1st ed. 2018 edition

This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors.

197 pages, 80 Tables, color; 72 Illustrations, color; 32 Illustrations, black and white; XX, 197 p.

Medij	Knjige Hardcover Book (Knjiga s trdim hrbtom in platnicami)
Izdano	5. julija 2017
ISBN13	9789811010729
Založniki	Springer Verlag, Singapore
Strani	197
Dimenzije	150 × 220 × 20 mm · 485 g